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Posted: Wednesday, March 7, 2018 9:20 AM

Are you thinking about where to build your career? Do you want to join a premier organization and collaborate with the best minds in the world?

FIVR is Intel’s Flagship and Revolutionary Voltage-Regulator-on-die Technology. The FIVR HIP team integrates analog and digital circuits to deliver voltage solutions to various SOCs that goes into Intel’s amazing products.

As a SoC Design Engineer in the FIVR team, you will oversee definition, design, verification, and documentation for SoC System on a Chip development. You will contribute to the development of multidimensional designs involving the layout of complex integrated circuits, perform all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to craft a design database that is ready for manufacturing. You will analyze equipment to establish operation infrastructure, conducts experimental tests, and evaluate results.

Your responsibilities will also include but not be limited to:

  • Block-level floor planning
  • Logic synthesis of design blocks
  • Formal Equivalence Verification FEV
  • Auto Place-and-Route APR using Synopsys ICC tools
  • Timing verification using Synopsys PrimeTime as well as Intel tools
  • Physical verification
  • Layout vs. Schematic LVS, Design Rule Checks DRC, Electrical Rule Checks ERC, and Design for Manufacturability checks DFM
  • Analog signal specific requirements/checks
  • Assist in the preparation of the full-chip layout design database for introduction
  • Define module interfaces/formats for simulation.
  • Perform Logic design for integration of cell libraries, functional units and sub-systems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.


  • BSEE, BSCE or related degree with 2+ years of educational or corporate experience
  • Experience with one or more of the following: Synopsys/Cadence SoC design tools, flows and methodology ICCDP, Design Compiler, IC Compiler/ICC, Primetime, clock tree synthesis.
  • Programming experience in at least one, or more, of the following: VCS, VHDL, Verilog, SystemVerilog, TCL, Perl, Python

Additional (Preferred) Qualifications:

  • Advanced degree in Electrical, Computer Engineering, or related
  • Experience with Analog circuit design and/or Automation is helpful.
  • Experience contributing to complex designs/blocks in IP/SoC environments is a plus.
  • Layout cleanup experience DRCs, density, ipc, etc. is desirable.
  • Strong communication skills verbal and written, teamwork skills, and can work effectively in a dynamic work environment.
  • Experience analyzing and solving complex problems.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

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• Location: Portland

• Post ID: 27126177 portland is an interactive computer service that enables access by multiple users and should not be treated as the publisher or speaker of any information provided by another information content provider. © 2018